power architecture ? mcus pxd20 family built on power architecture ? technology overview the pxd20 family of 32-bit mcus built on power architecture ? technology provides a cost-effective, single-chip display solution for the industrial market. integrated tft drivers with digital video input ability from an external video source, significant on-chip memory (including dedicated graphics memory) and low-power design methodologies provide flexibility and reliability in meeting display demands in rugged environments. the platform architecture includes on-chip display control units that directly drive up to two tft displays. the pxd20 family offers you a high-quality industrial display solution. quality industrial display solutions target applications ? factory display units ? building control display units ? ruggedized displays ? industrial instrumentation pxd20 block diagram system watchdog dma (16-ch.) e200z4 periodic interrupt timer system timer interrupt controller control adc (20-ch., 10-bit) 2 x timer (16-ch.) stepper motor drivers memory 2 x sram controller dram controller 64 kb sram w/ecc 1 mb graphics sram 2 mb flash w/ecc quad spi flash interface cache mmu debug core vle boot assist module (bam) memory protection unit nexus jtag vreg rtc 32k osc 2 x frequency modulated pll display control unit lite display control unit video input graphics accelerator clock monitor unit crossbar switch communication 3 x spi 4 x uart 3 x can sound generation module 4 x i 2 c display pxd20 block diagram
freescale and the freescale logo are trademarks of freescale semiconductor, inc., reg. u.s. pat. & tm. off. the power architecture and power.org word marks and the power and power.org logos and related marks are trademarks and service marks licensed by power.org. peg brand name is a registered trademark of swell software llc in the us patent and trademark office. all other product or service names are the property of their respective owners. ? 2012 freescale semiconductor, inc. document number: pxd20fs rev 0 for current information about pxd20 family products and documentation, please visit freescale.com/pxd20 and freescale.com/tower documentation freescale doument number title description pxd20 pb pxd20 microcontroller product brief device family summary enablement ecosystem the pxd20 family of mcus is supported by the tower development system, the complimentary mqx? rtos and the swell peg gui development software enabling shorter development cycles. low-power design ? designed for dynamic power management of core and peripherals ? software-controlled clock gating of peripherals ? multiple power domains to minimize leakage in low-power modes key features ? two display control units for direct drive of up to two tft lcd displays with wvga resolution single controller can drive a tft lcd display with xga resolution ? graphics accelerator supporting openvg 1.1 ? digital input for video and data ? memory: 2 mb on-chip flash memory with ecc 1 mb on-chip non-ecc graphics sram with two-port graphics sram controller ? stepper motor controller ? 10-bit adc ? two 16-channel timers ? dram controller ddr1/2, lpddr selector guide product number temp ranges features package speed PXD2020 -40oc to +105oc e200z4 core, 125 mhz, 2 mb fash (ecc), 64 kb ram (ecc), 1 mb graphics ram, graphics accelerator, tft lcd controller, 10-bit 16-ch. adc, stepper motor controller 176 lqfp, 125 mhz PXD2020 -40oc to +105oc e200z4 core, 125 mhz, 2 mb fash (ecc), 64 kb ram (ecc), 1 mb graphics ram, graphics accelerator, 2x tft lcd controllers, 10-bit 20-ch. adc, stepper motor controller 208 lqfp 125 mhz PXD2020 -40oc to +105oc e200z4 core, 125 mhz, 2 mb fash (ecc), 64 kb ram (ecc), 1 mb graphics ram, graphics accelerator, 2x tft lcd controllers, 10-bit 20-ch. adc, stepper motor controller, dram controller 416 mapbga 125 mhz challenges and solutions system challenges pxd20 solutions reducing system costs and simplifying design ? integrated display controller reduces hmi design complexity ? on-chip flash enables graphics generation without the need for external dram ? on-chip quad spi flash controller and on-chip dram controller can be utilized if additional memory is required ? stepper motor capability can be included in the design with on-chip controller creating an easy-to- use human-machine interface (hmi) application ? tft lcd controller can drive up to two tft lcd displays, providing a more feature-rich hmi solution ? swell peg embedded graphics software provides development tool support ? dedicated on-chip 1 mb graphics sram ? digital video inputs are offered in a variety of formats, including rgb666, rgb565, monochrome and ycbcr422
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